A Six Level Diode Clamped Multi Level Inverter with APOD PWM

4 Pages Posted: 15 Aug 2019

See all articles by Sangeetha

Sangeetha

Government College of Engineering Kannur

Dr. Ismayil C.

Government College of Engineering Kannur

Asokan

Government College of Engineering Kannur

Abhiram

Government College of Engineering Kannur

Date Written: August 13, 2019

Abstract

In this paper a six level diode clamped multi level inverter (DCMLI) with alternate phase opposition disposition (APOD) PWM technique is discussed and simulated using Matlab/Simulink. This DCMLI is capable of giving an output of six levels without a zero level. The six level consist of equal positive and negative level. The inverter uses five carrier waves, and one trapezoidal wave as the reference signal for pulse generation. The THD analysis for the same is carried out.

Keywords: Alternate Phase Opposition Disposition (APOD), Diode clamped, Multi Level Inverter (MLI), Pulse Width Modulation (PWM)

Suggested Citation

V, Sangeetha and C., Ismayil and O V, Asokan and J S, Abhiram, A Six Level Diode Clamped Multi Level Inverter with APOD PWM (August 13, 2019). In proceedings of the International Conference on Systems, Energy & Environment (ICSEE) 2019, GCE Kannur, Kerala, July 2019, Available at SSRN: https://ssrn.com/abstract=3436608 or http://dx.doi.org/10.2139/ssrn.3436608

Sangeetha V (Contact Author)

Government College of Engineering Kannur ( email )

Kannur
India

Ismayil C.

Government College of Engineering Kannur ( email )

Kannur
India

Asokan O V

Government College of Engineering Kannur ( email )

Kannur
India

Abhiram J S

Government College of Engineering Kannur ( email )

Kannur
India

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