Embedding Parallelism in the Process of Sorting
Proceedings of the 5th International Conference on Cyber Security & Privacy in Communication Networks (ICCS) 2019 | National Institute of Technology, Kurukshetra, India
7 Pages Posted: 30 Dec 2019
Date Written: December 29, 2019
Abstract
This paper is aimed at discussing the efficiency gained in the process of sorting by embedding parallelism in the task of comparing the values. The interconnection networks to implement the logic and the criteria embedded to generate parallelism in the process are discussed. Depending on the logic embedded to generate parallelism in sorting, improvement in the performance of the process of sorting varies. Speedup gained and efficiency generated by three sorting algorithms: enumeration sort, odd-even transposition sort, parallel quicksort are discussed. As improvement in performance demands extra cost, hence the criteria chosen to embed parallelism is a trade off between the increase in overall cost and decrease in time taken in generating the result. The scenario in which each of the algorithms generates good performance and is preferred to be implemented is discussed and the efficiency gained by each criteria of parallelism is illustrated.
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