Performance Analysis of CMOS Technology

12 Pages Posted: 10 Jul 2020 Last revised: 14 Jul 2020

See all articles by Sarthak Talwar

Sarthak Talwar

Galgotias University School Of E&TC Engineering

Baibaswata Mohapatra

Galgotias University - School of Electrical, Electronics and Communication Engineering

Mohammad Rashid Ansari

Galgotias University, School Of Electrical, Electronics and Communication Engineering

Date Written: May 23, 2020

Abstract

The project titled “Performance Evaluation of CMOS Technology” is a research conducted to provide students with guidelines about what to invest their time in the field of VLSI & ULSI technology and enlighten them about various parameters of Scaling of CMOS technology which is the most used IC technology in the world. This report also studies the range of scaling of MOSFET and its limits. The performance of a device relies highly on the performance of the IC and Transistors used in its circuit hardware.

CMOS which is the abbreviation of Complementary Metal Oxide Semiconductor is a technology used to design Integrated Circuits. The Complementary prefix to MOS that refers to MOSFET signifies the use of complementary semiconductors that is NMOS and PMOS. These two MOS technologies work together to form a wide array of gates and Integrated Circuits.
This research provides students various results on the unreliability of Student Version Simulation software in designing new generation hardware and how power dynamics of highly scaled technology cannot be verified using such tools.

Keywords: CMOS, MOSFET, Noise Margin, Threshold Voltage

JEL Classification: C00,L15

Suggested Citation

Talwar, Sarthak and Mohapatra, Baibaswata and Ansari, Mohammad Rashid, Performance Analysis of CMOS Technology (May 23, 2020). 2nd International Conference on Communication & Information Processing (ICCIP) 2020, Available at SSRN: https://ssrn.com/abstract=3647984 or http://dx.doi.org/10.2139/ssrn.3647984

Sarthak Talwar (Contact Author)

Galgotias University School Of E&TC Engineering ( email )

Plot No.2, Sector 17-A
Yamuna Expressway
Greater Noida, UT Uttar Pradesh 201306
India

Baibaswata Mohapatra

Galgotias University - School of Electrical, Electronics and Communication Engineering ( email )

Greater Noida, Uttar Pradesh
India

Mohammad Rashid Ansari

Galgotias University, School Of Electrical, Electronics and Communication Engineering ( email )

Plot No.2, Sector 17-A
Yamuna Expressway
Greater Noida, UT Uttar Pradesh 201306
India

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